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v bb rc v cc logic supply load supply 9 phase uvlo & tsd r s mode ref out a out b enable sense C + brake input logic ground q r s pwm latch v cc + C blanking sleep & standby modes v th r t c t 1 2 2 3 6 7 8 10 11 14 15 4 ground 12 load supply 16 5 13 description designed for bidirectional pulse width modulated (pwm) current control of inductive loads, the A4973 is capable of continuous output currents to 1.5 a and operating voltages to 50 v. internal fixed off-time pwm current-control circuitry can be used to regulate the maximum load current to a desired value. the peak load current limit is set by the user?s selection of an input reference voltage and external sensing resistor. the fixed off-time pulse duration is set by a user- selected external rc timing network. internal circuit protection includes thermal shutdown with hysteresis, transient-suppression diodes, and crossover current protection. special power-up sequencing is not required. with the enable input held low, the phase input controls load current polarity by selecting the appropriate source and sink driver pair. the mode input determines whether the pwm current-control circuitry operates in a slow current-decay mode (only the selected source driver switching) or in a fast current-decay mode (selected source and sink switching). a user-selectable blanking window prevents false triggering of the pwm current-control circuitry. with the enable input held high, all output drivers are disabled. a sleep mode is provided to reduce power consumption. 4973ds features and benefits ? 1.5 a continuous output current ? 50 v output voltage rating ? 3 v to 5.5 v logic supply voltage ? internal pwm current control ? fast and slow current-decay modes ? sleep (low current consumption) mode ? internal transient-suppression diodes ? internal thermal shutdown circuitry ? crossover current and uvlo protection full-bridge pwm motor driver continued on the next page? packages: functional block diagram not to scale A4973 package b, 16-pin dip with exposed tabs package lb, 16-pin soic with internally fused pins www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com description (continued) absolute maximum ratings characteristic symbol notes rating units load supply voltage v bb 50 v logic supply voltage v cc 6v logic/reference input voltage range v in ?0.3 to 6 v sense voltage v sense 0.5 v output current, continuous i out output current rating may be limited by duty cycle, ambient temperature, and heat sinking. under any set of conditions, do not exceed the speci ed current rating or a junction tempera- ture of 150 c. 1.5 a package power dissipation p d see graph w operating ambient temperature t a range s ?20 to 85 oc maximum junction temperature t j (max) fault conditions that produce excessive junction temperature will activate the device?s thermal shutdown circuitry. these conditions can be tolerated but should be avoided. 150 oc storage temperature t stg ?55 to 150 oc selection guide part number package packing A4973sb-t 16-pin dip with exposed thermal tabs 25 pieces per tube A4973slbtr-t 16-pin soicw with internally-fused pins 1000 pieces per reel when a logic low is applied to the brake input, the braking function is enabled. this overrides enable and phase to turn off both source drivers and turn on both sink drivers. the brake function can be used to dynamically brake brush dc motors. the A4973 is supplied in a choice of two power packages; a 16-pin dual-in-line plastic package with copper heat-sink tabs, and a 16-pin plastic soic with copper heat-sink tabs. for both package styles, the power tab is at ground potential and needs no electrical isolation. each package type is available in a lead (pb) free version (100% matte tin plated leadframe). thermal characteristics characteristic symbol test conditions* value units package thermal resistance, junction to ambient r ja b package, single-layer pcb, 1 in. 2 2-oz. exposed copper 43 oc/w lb package, 2-layer pcb, 0.3 in. 2 2-oz. exposed copper each side 67 oc/w package thermal resistance, junction to tab r jt 6 oc/w *additional thermal information available on allegro website. mode ground ground logic supply phase ground ground rc sense load supply dwg. pp-056 brake ref load supply v cc out b out a v bb v bb logic enable 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 50 75 100 125 150 1 0 allowable package power dissipation (w) temperature in c 4 3 2 25 r = 6.0c/w jt suffix 'b', r = 43c/w ja suffix 'lb', r = 67c/w ja note the A4973sb (dip) and the A4973slb (soic) are electrically identical and share a common terminal number assignment. www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com electrical characteristics at t j = 25c, v cc = 3.0 v to 5.5 v (unless otherwise noted.) characteristic symbol test conditions min. typ. max. unit power outputs load supply voltage range v bb operating 5 ? 50 v output leakage current i cex v out = v bb ? <1.0 50 a v out = 0 v ? 8 v, t j = 25c ? 1 1.4 ac timing pwm rc fixed off-time t off rc c t = 680 pf, r t = 30 k , v cc = 3.3 v 18.3 20.4 22.5 s pwm minimum on time t on(min) v cc = 3.3 v, r t 12 k , c t = 680 pf 0.8 1.4 1.9 s v cc = 5.0 v, r t 12 k , c t = 470 pf 0.8 1.6 2.0 s crossover dead time t codt ? 500 ? ns maximum pwm frequency f pwm(max) i out = 1.5 a 70 ? ? khz control circuitry thermal shutdown temperature t j ? 165 ? c thermal shutdown hysteresis ? t j ?15? c uvlo enable threshold 2.5 2.75 3.0 v uvlo hysteresis 0.12 0.17 0.25 v logic supply current i cc(on) v enable = v in(0) , v brake = v in(1) ? 2.7 3.5 ma i cc(sleep) v enable = v mode = v brake = v in(1) ? 250 450 a motor supply current (no load) i bb(on) v enable = v in(0) ? 500 700 a i bb(sleep) v enable = v mode = v brake = v in(1) ? <1.0 3 a logic supply voltage range v cc operating 3.0 5.0 5.5 v logic input voltage v in(1) v cc 0.55 ??v v in(0) ?? v cc 0.27 v logic input current i in(1) v in = v cc = 5 v ? 0 ?10 a i in(0) v in = 0 v, v cc = 5 v ? ?106 ?200 a reference input current i ref v ref = 0 v to 1 v ? ? 5.0 a comparator input offset volt. v io v ref = 0 v ? 2.0 5.0 mv reference input voltage range v ref ref pin 0 ? 1 v gain v ref = 1 v 1.9 2 2.1 ? www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com functional description internal pwm current control during forward and reverse operation. the A4973 contains a fixed off-time pulse width modulated (pwm) current-control circuit that can be used to limit the load current to a desired value. the peak value of the current limiting (i trip ) is set by the selection of an external current sensing resistor (r s ) and reference input voltage (v ref ). the internal circuitry compares the voltage across the external sense resistor to the voltage on the reference input terminal (ref) resulting in a transconductance function approximated by: in forward or reverse mode the current-control circuitry limits the load current as follows: when the load current reaches i trip , the comparator resets a latch that turns off the selected source driver or selected sink and source driver pair depending on whether the device is operating in slow or fast current-decay mode, respectively. in slow current-decay mode, the selected source driver is disabled and both sinks are turned on. the load inductance causes the current to recirculate through the sink drivers. in fast current-decay mode, the selected sink and source driver pair are disabled, then the opposite pair is turned on. the load inductance causes the current to flow from ground to the load supply via the motor winding and the opposite pair of transistors (see figure 1). the user selects an external resistor (r t ) and capacitor (c t ) to determine the time period (t off = r t x c t ) during which the drivers remain disabled (see rc fixed off-time section, below). at the end of the rc interval, the drivers are enabled allowing the load current to increase again. the pwm cycle repeats, maintaining the peak load current at the desired value (figure 2). figure 2 fast and slow current-decay waveforms brake operation. during braking, care should be taken to ensure that the motor?s current does not exceed the ratings of the device. the braking current can be measured by using an oscilloscope with a current probe connected to one of the motor?s leads, or if the back-emf voltage of the motor is known, approximated by: v bemf r load i peak brake ml rc fixed off-time. the internal pwm current-control circuitry uses a one shot to control the time the driver(s) remain(s) off. the one-shot time, t off (fixed off-time), is determined by the selection of an external resistor (r t ) and capacitor (c t ) connected in parallel from the rc timing terminal to ground. the fixed off-time, over a range of values of c t = 470 pf to 1500 pf and r t = 12 k to 100 k , is approximated by: t off r t x c t v ref 2 r s i trip figure 1 ? load-current paths r s v bb drive current (normal) recirculation (fast decay) recirculation (slow decay) enable mode load current rc i trip dwg. wp-015-1 rc www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com truth table brake enable phase mode out a out b description h h x h off off sleep mode h h x l off off standby h l h h h l forward, fast current-decay mode h l h l h l forward, slow current-decay mode h l l h l h reverse, fast current-decay mode h l l l l h reverse, slow current-decay mode l x x x l l brake x = don?t care. www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com the operation of the circuit is as follows: when the pwm latch is reset by the current comparator, the voltage on the rc terminal will begin to decay from approximately 0.60v cc . when the voltage on the rc terminal reaches approximately 0.22v cc , the pwm latch is set, thereby enabling the driver(s). rc blanking. in addition to determining the fixed off-time of the pwm control circuit, the c t component sets the comparator blanking time. this function blanks the output of the comparator when the outputs are switched by the internal current-control circuitry (or by the phase, brake, or enable inputs). the comparator output is blanked to prevent false over-current detections due to reverse recovery currents of the clamp diodes, and/or switching transients related to distributed capacitance in the load. during internal pwm operation, at the end of the t off time, the comparator?s output is blanked and c t begins to be charged from approximately 0.22v cc by an internal current source of approximately 1 ma. the comparator output remains blanked until the voltage on c t reaches approximately 0.60v cc . when a transition of the phase input occurs, c t is discharged to near ground during the crossover delay time (the crossover delay time is present to prevent simultaneous conduction of the source and sink drivers). after the crossover delay, c t is charged by an internal current source of approximately 1 ma. the comparator output remains blanked until the voltage on c t reaches approximately 0.60v cc . when the device is disabled, via the enable input, c t is discharged to near ground. when the device is re-enabled, c t is charged by an internal current source of approximately 1 ma. the comparator output remains blanked until the voltage on c t reaches approximately 0.60v cc . for 3.3 v operation, the minimum recommended value for c t is 680 pf 5 %. for 5.0 v operation, the minimum recommended value for c t is 470 pf 5%. these values ensure that the blanking time is sufficient to avoid false trips of the comparator under normal operating conditions. for optimal regulation of the load current, the above values for c t are recommended and the value of r t can be sized to determine t off . for more information regarding load current regulation, see below. load current regulation with internal pwm current-control circuitry when the device is operating in slow current-decay mode, there is a limit to the lowest level that the pwm current- control circuitry can regulate load current. the limitation is the minimum duty cycle, which is a function of the user-selected value of t off and the minimum on-time pulse t on(min) max that occurs each time the pwm latch is reset. if the motor is not rotating (as in the case of a stepper motor in hold/detent mode, a brush dc motor when stalled, or at startup), the worst case value of current regulation can be approximated by: { [ v bb ? (2 i r ds ) ] t on(min) max } ? [1.05 (i r ds + v f ) t off ] 1.05 (t on(min) max + t off ) r load i ave where t off = r t x c t , r load is the series resistance of the load, v bb is the motor supply voltage and t on(min) max is specified in the electrical characteristics table. when the motor is rotating, the back emf generated will influence the above relationship. for brush dc motor applications, the current regulation is improved. for stepper motor applications, when the motor is rotating, the effect is more complex. a discussion of this subject is included in the section on stepper motors below. the following procedure can be used to evaluate the worst-case slow current-decay internal pwm load current regulation in the system: 1. set v ref to 0 volts. with the load connected and the pwm current control operating in slow current-decay mode, use an oscilloscope to measure the time the output is low (sink on) for the output that is chopping. this is the typical minimum on time (t on(min) typ) for the device. 2. the c t then should be increased until the measured value of t on(min) is equal to t on(min) max as specified in the electrical characteristics table. 3. when the new value of c t has been set, the value of r t should be decreased so the value for t off = r t x c t (with the artificially increased value of c t ) is equal to the nominal design value. 4. the worst-case load-current regulation then can be measured in the system under operating conditions. www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com pwm of the phase and enable inputs. the phase and enable inputs can be pulse-width modulated to regulate load current. if the internal pwm current control is used, the comparator blanking function is active during phase and enable transitions. this eliminates false tripping of the over-current comparator caused by switching transients (see rc blanking section, above). enable pwm. with the mode input low, toggling the enable input turns on and off the selected source and sink drivers. the corresponding pair of intrinsic flyback and ground- clamp diodes conduct after the drivers are disabled, resulting in fast current decay. when the device is enabled the internal current-control circuitry will be active and can be used to limit the load current in a slow current-decay mode. for applications that pwm the enable input and desire the internal current-limiting circuit to function in the fast decay mode, the enable input signal should be inverted and connected to the mode input. this prevents the device from being switched into sleep mode when the enable input is low. phase pwm. toggling the phase terminal selects which sink/source pair is enabled, producing a load current that varies with the duty cycle and remains continuous at all times. this can have added benefits in bidirectional brush dc servo motor applications as the transfer function between the duty cycle on the phase input and the average voltage applied to the motor is more linear than in the case of enable pwm control (which produces a discontinuous current at low current levels). for more information see dc motor applications section, below. synchronous fixed-frequency pwm. the internal pwm current-control circuitry of multiple A4973 devices can be synchronized by using the simple circuit shown in figure 3. a 555 ic can be used to generate the reset pulse/blanking signal (t 1 ) for the device and the period of the pwm cycle (t 2 ). the value of t 1 should be a minimum of 1.5 ms. when used in this configuration, the r t and c t components should be omitted. the phase and enable inputs should not be pwmed with this circuit configuration due to the absence of a blanking function synchronous with their transitions. miscellaneous information. a logic high applied to both the enable and mode terminals puts the device into a sleep mode to minimize current consumption when not in use. an internally generated dead time prevents crossover currents that can occur when switching phase or braking. thermal protection circuitry turns off all drivers should the junction temperature reach 165c (typical). this is intended only to protect the device from failures due to excessive junction temperatures and should not imply that output short circuits are permitted. the hysteresis of the thermal shutdown circuit is approximately 15c. application notes current sensing. the actual peak load current (i peak ) will be above the calculated value of i trip due to delays in the turn off of the drivers. the amount of overshoot can be approximated by: (v bb ? [(i trip x r load ) + v bemf ]) x t pwm(off) l load i os where v bb is the motor supply voltage, v bemf is the back-emf voltage of the load, r load and l load are the resistance and inductance of the load respectively, and t pwm(off) is specified in the electrical characteristics table. the reference terminal has a maximum input bias current of 5 a. this current should be taken into account when determining the impedance of the external circuit that sets the reference voltage value. to minimize current-sensing inaccuracies caused by ground trace i x r drops, the current-sensing resistor should have a separate return to the ground terminal of the device. for low- value sense resistors, the i x r drops in the printed wiring board can be significant and should be taken into account. the use of sockets should be avoided as their contact resistance can cause variations in the effective value of r s . generally, larger values of r s reduce the aforementioned effects but can result in excessive heating and power loss in the sense resistor. the selected value of r s should not cause the absolute maximum voltage rating of 500 mv, for the sense terminal, to be exceeded. dwg. ep-060 100 k 20 k 1n4001 2n2222 v cc rc 1 rc n t 1 2 t figure 3 synchronous fixed-frequency control circuit www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com the current-sensing comparator functions down to ground allowing the device to be used in microstepping, sinusoidal, and other varying current-profile applications. thermal considerations. for reliable operation it is recommended that the maximum junction temperature be kept below 110c to 125c. the junction temperature can be measured best by attaching a thermocouple to the power tab/batwing of the device and measuring the tab temperature, t tab . the junction temperature can then be approximated by using the formula: t j t tab + i 2 load r ds(on) x r jt the value for r jt is given in the package thermal resistance table for the appropriate package. the power dissipation of the batwing packages can be improved by 20% to 30% by adding a section of printed circuit board copper (typically 6 to 18 square centimeters) connected to the batwing terminals of the device. pcb layout. the load supply terminal, v bb , should be decoupled with an electrolytic capacitor (>47 f is recommended) placed as close to the device as is physically practical. to minimize the effect of system ground i x r drops on the logic and reference input signals, the system ground should have a low-resistance return to the motor supply voltage. see also the current sensing and thermal considerations sections, above. fixed off-time selection. with increasing values of t off, switching losses will decrease, low-level load-current regulation will improve, emi will be reduced, the pwm frequency will decrease, and ripple current will increase. the value of t off can be chosen for optimization of these parameters. for applications where audible noise is a concern, typical values of t off are chosen to be in the range of 15 to 35 s. stepper motor applications. the mode terminal can be used to optimize the performance of the device in microstepping/ sinusoidal stepper-motor drive applications. when the load current is increasing, slow decay mode is used to limit the switching losses in the device and iron losses in the motor. this also improves the maximum rate at which the load current can increase (as compared to fast decay) due to the slow rate of decay during t off . when the load current is decreasing, fast-decay mode is used to regulate the load current to the desired level. this prevents tailing of the current profile caused by the back-emf voltage of the stepper motor. in stepper-motor applications applying a constant current to the load, slow-decay mode pwm is typically used to limit the switching losses in the device and iron losses in the motor. dc motor applications . in closed-loop systems, the speed of a dc motor can be controlled by pwm of the phase or enable inputs, or by varying the reference input voltage (ref). in digital systems (microprocessor controlled), pwm of the phase or enable input is used typically thus avoiding the need to generate a variable analog voltage reference. in this case, a dc voltage on the ref input is used typically to limit the maximum load current. in dc servo applications, which require accurate positioning at low or zero speed, pwm of the phase input is selected typically. this simplifies the servo control loop because the transfer function between the duty cycle on the phase input and the average voltage applied to the motor is more linear than in the case of enable pwm control (which produces a discontinuous current at low current levels). with bidirectional dc servo motors, the phase terminal can be used for mechanical direction control. similar to when braking the motor dynamically, abrupt changes in the direction of a rotating motor produces a current generated by the back-emf. the current generated will depend on the mode of operation. if the internal current control circuitry is not being used, then the maximum load current generated can be approximated by i load = (v bemf + v bb )/r load where v bemf is proportional to the motor?s speed. if the internal slow current-decay control circuitry is used, then the maximum load current generated can be approximated by i load = v bemf /r load . for both cases care must be taken to www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 9 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com ensure that the maximum ratings of the device are not exceeded. if the internal fast current-decay control circuitry is used, then the load current will regulate to a value given by: i load = v ref / (r s 2) caution : in fast current-decay mode, when the direction of the motor is changed abruptly, the kinetic energy stored in the motor and load inertia will be converted into current that charges the v bb supply bulk capacitance (power supply output and decoupling capacitance). care must be taken to ensure that the capacitance is sufficient to absorb the energy without exceeding the voltage rating of any devices connected to the motor supply. see also the brake operation section, above. soldering considerations . the lead (pb) free (100% matte tin) plating on lead terminations is 100% backward- compatible for use with traditional tin-lead solders of any composition, at any temperature of soldering that has been traditionally used for that tin-lead solder alloy. further, 100% matte tin finishes solder well with tin-lead solders even at temperatures below 232c. this is because the matte tin dissolves easily in the tin-lead. additional information on soldering is available on the allegro web site, www.allegromicro.com. figure 4 ? typical application v cc v bb v bb logic 47 m f + 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 30 k 7 0.5 7 v bb mode phase enable brake 470 pf +5 v ref www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 10 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com lb package 16-pin soicw 9.50 0.65 2.25 1.27 c seating plane c 0.10 16x 1.27 0.25 0.20 0.10 0.41 0.10 2.65 max 10.300.33 7.500.10 4 4 0.27 +0.07 ?0.06 0.84 +0.44 ?0.43 10.300.20 2 1 16 gauge plane seating plane for reference only pins 4 and 5, and 12 and 13 internally fused dimensions in millimeters (reference jedec ms-013 aa) dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown a terminal #1 mark area a b reference pad layout (reference ipc soic127p1030x265-16m) all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances b pcb layout reference view b package 16-pin dip 2 19.050.25 5.33 max 0.46 0.12 1.27 min 1 16 a dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown a terminal #1 mark area 6.35 +0.76 ?0.25 3.30 +0.51 ?0.38 10.92 +0.38 ?0.25 1.52 +0.25 ?0.38 0.38 +0.10 ?0.05 7.62 2.54 for reference only (reference jedec ms-001 bb) dimensions in millimeters www.datasheet.co.kr datasheet pdf - http://www..net/
full-bridge pwm motor driver A4973 11 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com copyright ?2009-2011, allegro microsystems, inc. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes n o re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. for the latest version of this document, visit our website: www.allegromicro.com revision history revision revision date description of revision final december 19, 2011 update production availability www.datasheet.co.kr datasheet pdf - http://www..net/

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